1. Field of The Invention
This invention relates to a gain and/or phase adjustment control system to adjust the relative phase and/or gain between combining signals for example in a distortion reduction system.
2. Description of Related Art
Amplifiers often add undesired distortion to a signal, creating an output signal comprising distortion or nonlinear components and the signal component. The distortion includes any undesired signals added to or affecting adversely the input signal. There is therefore a need to devise techniques that can eliminate substantially or reduce significantly the distortion produced by the amplifier.
Feed-forward correction is routinely deployed in modern amplifiers to improve amplifier linearity with various input patterns. The essence of the feed-forward correction is to manipulate distortion, such as intermodulation (IMD) components, created by the amplifier so that at the final summing point, the distortion cancels out. Due to the unpredictability of input RF carrier pattern as well as the resultant distortion location, a known frequency component, i.e. a pilot signal, is injected in the main signal path with the distortion produced by the amplification process. In feed-forward amplifiers, the feed forward distortion reduction circuitry minimizes the pilot signal along with the distortion. As such, by designing the feed forward distortion reduction circuitry to detect and cancel the pilot signal, the distortion can also be removed.
The pilot signal is an electrical signal comprising at least one frequency component spectrally located near the frequency band of operation of the electrical circuit. A more complete description of the pilot signal is shown in FIG. 1 which shows the frequency response of a radio frequency (RF) amplifier including the location of the pilot signal. The pilot signal can be near the lower edge of the operating band (e.g., pilot 1) and/or located near the upper edge of the band of operation (e.g., pilot 2). The pilot is positioned a spectral distance of .DELTA. .function. from an edge of the band of operation whose center frequency is .function. .sub.0. The electrical characteristics (e.g., amplitude, phase response, spectral content) of the pilot signal are known. It should be noted that although the pilot signal is shown as having one or two spectral components of a certain amplitude, the pilot signal can comprise a plurality of spectral components having various amplitudes.
The feed forward distortion reduction circuitry reduces distortion produced by the RF amplifier by applying the pilot signal to the RF amplifier and making adjustments based on information obtained from the applied pilot signal. FIG. 2 discloses feed-forward correction circuitry 10 and its use of information obtained from the pilot signal to reduce distortion produced by RF amplifier 12. An input signal, for example including at least one carrier signal, is applied to a splitter 14. The splitter 14 replicates the input signal on a main signal path 16 and a feed forward path 18. The splitter 14 is part of a carrier cancellation loop referred to as loop #1, which in addition to the splitter 14, comprises gain & phase circuit 20, coupler 22, the RF amplifier 12, delay circuit 24 and couplers 26 and 28. The signal on the main path 16 is applied to gain & phase circuit 20. The output of gain & phase circuit 20 and the pilot signal are applied to the coupler 22. Typically, the amplitude of the pilot signal is much less (e.g., 30 dB less) than the amplitude of the input signal so as not to interfere with the operation of the amplifier 12. The output of the coupler 22 is applied to the amplifier 12 whose output comprises the amplified input signal, the amplified pilot signal and distortion signals produced by the amplifier 12.
A portion of the output of the amplifier 12 is obtained from the coupler 26 and is combined at the coupler 28 via coupling path 30 with a delayed version of the input signal on the feed forward path 18 to isolate the pilot signal with distortion on the feed forward path 18. The input signal on the feed forward path 18 is sufficiently delayed by delay circuit 24 so that such signal experiences the same delay as the signal appearing at the coupler 28 via the path 30. The resulting error signal contains the distortion produced by the amplifier 12 along with any portion of the carrier signal remaining at the output of the coupler 28 and the pilot signal. The amount of carrier cancellation in the carrier cancellation loop depends on the proper gain and phase match between the two paths from the splitter 14 to the coupler 28.
The gain & phase circuit 20 adjusts the phase and gain of the input signal according to control signals on control paths 32 and 34 such that the signal appearing at the coupler 28 via the path 30 is substantially the inverse (equal in amplitude but 180.degree. out of phase) of the delayed input signal at the coupler 28. The gain and phase control signals appearing on the control paths 32 and 34 of the gain & phase circuit 20 are derived from the signal at the output of the coupler 28 in a well known manner using signal detection and control circuitry 35. In general, the signal detection and control circuitry 35 detects an error signal for the carrier cancellation loop. The error signal represents the amplitude of the signal at point A, and the signal detection and control circuitry 35 attempts to reduce the amplitude of the error signal by providing gain and/or phase control signals.
In this embodiment, the signal detection and control circuitry 35 includes a detector 36, such as a log detector, which produces a signal representing the amplitude of the signal at point A. A filter 38 filters the output of the log detector to produce a DC-type amplitude signal representing the amplitude of the error signal. The amplitude signal is provided to a nulling circuit 40. In response to the amplitude signal, the nulling circuit 40 provides the control signals on the control paths 32 and 34 to adjust the relative gain and/or phase between the combining signals at the coupler 28 and reduce the error signal, thereby reducing the carrier signal(s). When the error signal is minimized, the carrier signals combined at the coupler 28 substantially cancel each other leaving at the output of the coupler 28 the pilot signal with distortion produced by the amplifier 12. Loop #1 is thus a carrier cancellation loop which serves to isolate on the feed forward path 18 the pilot signal with distortion produced by the amplifier 12.
A distortion reduction loop or loop #2 attempts to reduce the pilot signal on the main signal path 16, thereby reducing the distortion produced by the amplifier 12, using the error signal at the output of the coupler 28. The pilot signal with distortion on the feed forward path 18 is fed to a gain & phase circuit 42. The output of the gain and phase circuit 42 is fed to amplifier 44 whose output is applied to coupler 46. The coupler 46 combines the amplified pilot signal and distortion on the feed forward path 18 with the signals from the amplifier 12 on the main signal path 16 (carrier signal(s), pilot signal with distortion). A delay circuit 40 on the main signal path 16 delays the signals from the output of the amplifier 12 on the main signal path 16 to experience substantially the same delay as the corresponding signals from the output of the amplifier 12 which pass over the coupling path 30 through the coupler 28 to the coupler 46.
A coupler 48 provides an error signal representative of the signal at the output of the coupler 46 onto a pilot detection path 50. Because the frequency, amplitude and other electrical characteristics of the pilot signal are known, pilot detection and control circuitry 52 can detect the amplitude of the remaining portion of the pilot signal from the error signal on the pilot detection path 50. The pilot detection and control circuitry 52 determines the amplitude of the pilot signal, and in response to the amplitude of the remaining pilot signal, the pilot detection and control circuitry 52 provides control signals to the phase and gain circuit 42. In general, the pilot detection and control circuitry 52 will detect the pilot signal and use this information to generate control signals onto paths 66 and 68 to cause the gain & phase circuit 42 to adjust the gain and/or phase of the pilot signal on the feed forward path 18 such that the pilot signal on the main path 16 as well as the distortion is substantially the inverse (equal in amplitude but 180.degree. out of phase) of the pilot signal and the distortion on the feed forward path 18 at the coupler 46. The corresponding pilot signals and distortion substantially cancel each other at the coupler 46 leaving the carrier signal(s) at the output of the system. Therefore, loop #2 is a distortion reduction loop which attempts to cancel the pilot signal to cancel substantially the distortion produced by the amplifier 12.
In this embodiment, the pilot detection and control circuitry 52 includes pilot receive circuitry 54 which includes a mixer 56 to frequency convert the error signal on the pilot detection path 52 to lower frequencies and a filter 58 to facilitate detection of the pilot signal by a signal detector 60. The detector 60, such as a log detector, produces a signal representing the amplitude of the signal at point B. A filter 62 filters the output of the detector 60 to produce a DC-type amplitude signal representing the amplitude of the remaining pilot signal. The amplitude signal is provided to a nulling circuit 64. In response to the amplitude signal, the nulling circuit 64 provides gain and phase control signals on the control paths 66 and 68 to the phase and gain circuit 42. The control signals are provided to adjust the relative gain and/or phase between the signals being combined at the coupler 46 and reduce the amplitude signal, thereby reducing the remaining pilot signal. The amount of cancellation of the pilot signal indicates the amount of distortion cancellation. When amplitude of the pilot signal is minimized, the pilot signals and distortion combined at the coupler 46 substantially cancel each other at the output of the coupler 46.
In actual systems, however, there is rarely an absolute cancellation of the combining signals. The amount of signal cancellation depends on the proper gain and phase match between the combining signals. Signal reduction as a function of gain and phase mismatch is shown in FIG. 3. The gain and phase characteristics of the amplifiers 12 and 44 as well as of the other devices vary over time. Such variations are typically due to the temperature, input power, device age and manufacturing variations. To maintain carrier cancellation performance in the carrier cancellation loop and distortion reduction in the distortion reduction loop, the signal detection and control circuitry 35 and the pilot detection and control circuitry 52 are designed to automatically control the gain and phase characteristics for the corresponding carrier cancellation and distortion reduction loops based on the amplitudes of the corresponding error signals. The nulling circuits 40 and 64 attempt to reduce the error signal (indicating improved cancellation) by comparing every error signal sample with a previous error signal sample. In response to the comparison, the nulling circuit 40 or 64 provides control signals to make phase and/or gain adjustments. Depending on the embodiment, nulling circuits can be used to control phase and/or gain. Since the detect and control circuitry 35 and 52 make both gain and phase adjustments but only one detector is shown for each, the nulling circuits 40 and 64 repeatedly make a series of gain adjustments followed by a series of phase adjustments.
The performance of the nulling circuitry 40 or 64 can be measured by two parameters: error cancellation related to the amount of cancellation which can be achieved and the rate of convergence relates to the speed in which a null is found. The phase and gain adjustment control voltage change from the nulling circuits 40 or 64 is determined by multiplying a step size or time constant (for example 0.01-0.05) with magnitude of the error signal. For example, the phase and gain control voltage can change based on the equation .DELTA.V.sub.out (n+1)=-K(n+1) * .vertline.error(n).vertline.* sign(error(n)-error(n-1)) * sign(.DELTA.V.sub.out (n)). As such, if the sign of error(n)-error(n-1) is positive (meaning the previous adjustment resulted in an increase in the error signal), then the negative sign in front of the equation flips the sign of the adjustment .DELTA.V.sub.out (n+1) as compared to the sign of the previous voltage change .DELTA.V.sub.out (n). If the sign of error(n)-error(n-1) is negative (meaning an improvement in the error signal), the negative sign in front of the equation maintains the sign of the previous adjustment .DELTA.V.sub.out (n) which resulted in the improvement.
When the feed forward correction circuitry 10 is being tuned, the step size is set to establish an adjustment resolution which provides adequate error signal cancellation at an adequate convergence rate. Afterward, the step-size or adjustment resolution remains fixed. Because the nulling circuits use a fixed time constant, there is a traded between the minimum error signal achievable and the speed of achieving the minimum error signal. If a fixed step-size is used, the error signal cannot be reduced below a certain fixed magnitude. When the error signal approaches the minimum, the step size becomes so coarse when compared to the error signal that the step-size becomes a limit on the amount that the error signal can be reduced. This constraint is due to the higher sensitivity of the magnitude of the error signal to gain and phase adjustments close to the null. When the error signal is large, the same step size can inhibit the rate of convergence. Additionally, if the step-size or adjustment resolution is too small and when the gain and phase adjustments are away from the null (or error signal is large), detection of whether gain or phase adjustments are improving the error signal cannot be accurately performed, resulting in incorrect decisions or adjustments.
In the embodiment of FIG. 2, the linear output range of the log detector 36 or 60 is 600 mV-2 volts. As such, the error signal has a magnitude which is offset by the 600 mV limitation of the log detector 36 or 60. After filtering, the log detector 36 or 60 outputs the error signal to the nulling circuit 40 or 64. The nulling circuit 40 or 64 is initially tuned to establish a fixed step size from 0.01 to 0.05. To determine the adjustment control signal, for example an adjustment voltage, the nulling circuit 40 or 64 multiplies the fixed step size or adjustment resolution by the magnitude of the error signal. In this embodiment, the gain and phase adjusters 20 and 42 can handle control signals on the paths 32 and 34 in the range of 6 mV-100 mV with each 1 volt change producing a 15 degree phase change by the phase adjustor and a 1 dB change in the gain by the gain adjuster. Such a control voltage change provides a 0.09 to 1.5 degree phase adjustment and a 0.006 dB to 0.1 dB gain adjustment. However, if the step size is fixed, the dynamic range of the nulling circuit 40 or 64 and accordingly of the gain and phase adjusters is limited. For example, if the step size is fixed at 0.03, the nulling circuit 40 or 64 produces a dynamic range for a gain and/or phase adjustment value of 18 mV to 60 mV. Therefore, the resulting dynamic range of the gain and phase adjusters 20 and 42 is limited to a 0.27 to 0.9 degree phase adjustment or a 0.018 dB to 0.06 dB gain adjustment for a single adjustment value. Dynamic range limits both steady state error cancellation and speed at which steady state error cancellation is achieved.
The nulling sensitivity and the location of the null varies as system parameters and transmit power varies. For example, in multi-user wireless communications systems, such as Code division multiple access (CDMA), Time division multiple access (TDMA), Global System for Mobile Communications (GSM) and orthogonal frequency division multiplexing (OFDM), multiple voice and/or traffic channels are combined into a single or multiple carriers. A linear amplifier should be able to react rapidly to transmit power changes and bursty traffic variations within the transient response specifications in the microsecond and millisecond ranges while providing adequate error cancellation.